/*-------------------------------- Arctic Core ------------------------------
 * Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
 * Contact: <contact@arccore.com>
 *
 * You may ONLY use this file:
 * 1)if you have a valid commercial ArcCore license and then in accordance with
 * the terms contained in the written license agreement between you and ArcCore,
 * or alternatively
 * 2)if you follow the terms found in GNU General Public License version 2 as
 * published by the Free Software Foundation and appearing in the file
 * LICENSE.GPL included in the packaging of this file or here
 * <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
 *-------------------------------- Arctic Core -----------------------------*/

#ifndef TMS570_PORTDEFS_H_
#define TMS570_PORTDEFS_H_

//#define PWM_IOMM_KICK0 0xFFFFEA38
//#define PWM_IOMM_KICK1 0xFFFFEA3C

// There are 48 PINMMR registers, each is 32 bits
// PINMMR37 and PINMMR38 are used to enable/disable PWM

#define PIN_FUNCTION_AD1EVT PORT_FUNC0
#define PIN_FUNCTION_AD2EVT PORT_FUNC1
#define PIN_FUNCTION_AWM_EXT_ENA PORT_FUNC1
#define PIN_FUNCTION_AWM_EXT_SEL_0 PORT_FUNC1
#define PIN_FUNCTION_AWM_EXT_SEL_1 PORT_FUNC1
#define PIN_FUNCTION_ECAP1 PORT_FUNC2
#define PIN_FUNCTION_ECAP2 PORT_FUNC2
#define PIN_FUNCTION_ECAP3 PORT_FUNC2
#define PIN_FUNCTION_ECAP4 PORT_FUNC4
#define PIN_FUNCTION_ECAP5 PORT_FUNC5
#define PIN_FUNCTION_ECAP6 PORT_FUNC4
#define PIN_FUNCTION_EMIF_ADDR_0 PORT_FUNC0
#define PIN_FUNCTION_EMIF_ADDR_1 PORT_FUNC0
#define PIN_FUNCTION_EMIF_ADDR_6 PORT_FUNC0
#define PIN_FUNCTION_EMIF_ADDR_7 PORT_FUNC0
#define PIN_FUNCTION_EMIF_ADDR_8 PORT_FUNC0
#define PIN_FUNCTION_EMIF_ADDR_8 PORT_FUNC0
#define PIN_FUNCTION_EMIF_BA_1 PORT_FUNC0
#define PIN_FUNCTION_EMIF_DATA_11 PORT_FUNC0
//#define PIN_FUNCTION_EMIF_DATA_11 PORT_FUNC1
#define PIN_FUNCTION_EMIF_NCS_0 PORT_FUNC0
#define PIN_FUNCTION_EMIF_NCS_3 PORT_FUNC0
#define PIN_FUNCTION_EMIF_NWE PORT_FUNC0
#define PIN_FUNCTION_EMIF_RNW PORT_FUNC1
#define PIN_FUNCTION_ETPWM4A PORT_FUNC2
#define PIN_FUNCTION_EQEP1A PORT_FUNC2
#define PIN_FUNCTION_EQEP1B PORT_FUNC3
#define PIN_FUNCTION_EQEP1I PORT_FUNC3
#define PIN_FUNCTION_EQEP1S PORT_FUNC4
#define PIN_FUNCTION_EQEP2A PORT_FUNC5
#define PIN_FUNCTION_EQEP2B PORT_FUNC5
#define PIN_FUNCTION_EQEP2I PORT_FUNC4
#define PIN_FUNCTION_EQEP2S PORT_FUNC3
#define PIN_FUNCTION_ETPWM1A PORT_FUNC2
#define PIN_FUNCTION_ETPWM1B PORT_FUNC2
#define PIN_FUNCTION_ETPWM1SYNCI PORT_FUNC1
#define PIN_FUNCTION_ETPWM1SYNCO PORT_FUNC2
//#define PIN_FUNCTION_ETPWM1SYNCO PORT_FUNC5
#define PIN_FUNCTION_ETPWM2A PORT_FUNC2
#define PIN_FUNCTION_ETPWM2B PORT_FUNC2
#define PIN_FUNCTION_ETPWM3A PORT_FUNC2
#define PIN_FUNCTION_ETPWM3B PORT_FUNC3
#define PIN_FUNCTION_ETPWM4B PORT_FUNC1
#define PIN_FUNCTION_ETPWM5A PORT_FUNC2
#define PIN_FUNCTION_ETPWM5B PORT_FUNC2
#define PIN_FUNCTION_ETPWM6A PORT_FUNC1
#define PIN_FUNCTION_ETPWM6B PORT_FUNC1
#define PIN_FUNCTION_ETPWM7A PORT_FUNC4
#define PIN_FUNCTION_ETPWM7B PORT_FUNC4
#define PIN_FUNCTION_EXTCLKIN PORT_FUNC1
#define PIN_FUNCTION_GIOA_0 PORT_FUNC0
#define PIN_FUNCTION_GIOA_1 PORT_FUNC0
#define PIN_FUNCTION_GIOA_2 PORT_FUNC0
#define PIN_FUNCTION_GIOA_3 PORT_FUNC0
#define PIN_FUNCTION_GIOA_4 PORT_FUNC0
#define PIN_FUNCTION_GIOA_5 PORT_FUNC0
#define PIN_FUNCTION_GIOA_6 PORT_FUNC0
#define PIN_FUNCTION_GIOA_7 PORT_FUNC0
#define PIN_FUNCTION_GIOB_0 PORT_FUNC0
#define PIN_FUNCTION_GIOB_1 PORT_FUNC0
#define PIN_FUNCTION_GIOB_2 PORT_FUNC0
#define PIN_FUNCTION_GIOB_3 PORT_FUNC0
#define PIN_FUNCTION_GIOB_4 PORT_FUNC0
#define PIN_FUNCTION_GIOB_5 PORT_FUNC0
#define PIN_FUNCTION_GIOB_6 PORT_FUNC0
#define PIN_FUNCTION_GIOB_7 PORT_FUNC0
#define PIN_FUNCTION_I2C_SCL PORT_FUNC1
#define PIN_FUNCTION_I2C_SDA PORT_FUNC1
#define PIN_FUNCTION_MDCLK PORT_FUNC2
#define PIN_FUNCTION_MDIO PORT_FUNC2
#define PIN_FUNCTION_MIBSPI1NCS_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI1NCS_1 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI1NCS_2 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI1NCS_3 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI1NCS_4 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI1NCS_5 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI1NENA PORT_FUNC0
#define PIN_FUNCTION_MIBSPI1SIMO_1 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI1SOMI_1 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI3CLK PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3NCS_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3NCS_1 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3NCS_2 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3NCS_3 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3NCS_4 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI3NCS_5 PORT_FUNC1
#define PIN_FUNCTION_MIBSPI3NENA PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3SIMO_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI3SOMI_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5CLK PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5NCS_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5NENA PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5SIMO_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5SOMI_0 PORT_FUNC0
#define PIN_FUNCTION_MIBSPI5SOMI_1 PORT_FUNC4
#define PIN_FUNCTION_MIBSPI5SOMI_2 PORT_FUNC4
#define PIN_FUNCTION_MII_COL PORT_FUNC2
#define PIN_FUNCTION_MII_CRS PORT_FUNC1
#define PIN_FUNCTION_MII_RX_AVCLK4 PORT_FUNC3
#define PIN_FUNCTION_MII_RX_DV PORT_FUNC1
#define PIN_FUNCTION_MII_RX_ER PORT_FUNC1
#define PIN_FUNCTION_MII_RXCLK PORT_FUNC1
#define PIN_FUNCTION_MII_RXD_0 PORT_FUNC2
#define PIN_FUNCTION_MII_RXD_1 PORT_FUNC1
#define PIN_FUNCTION_MII_RXD_2 PORT_FUNC2
#define PIN_FUNCTION_MII_RXD_3 PORT_FUNC2
#define PIN_FUNCTION_MII_TX_AVCLK4 PORT_FUNC3
#define PIN_FUNCTION_MII_TX_CLK PORT_FUNC1
#define PIN_FUNCTION_MII_TXD_0 PORT_FUNC2
#define PIN_FUNCTION_MII_TXD_1 PORT_FUNC2
#define PIN_FUNCTION_MII_TXD_2 PORT_FUNC2
#define PIN_FUNCTION_MII_TXD_3 PORT_FUNC2
#define PIN_FUNCTION_MII_TXEN PORT_FUNC2
#define PIN_FUNCTION_N2HET1_0 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_01 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_02 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_03 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_04 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_05 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_06 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_07 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_08 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_09 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_10 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_11 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_12 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_13 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_15 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_16 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_17 PORT_FUNC1
#define PIN_FUNCTION_N2HET1_18 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_19 PORT_FUNC1
#define PIN_FUNCTION_N2HET1_20 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_21 PORT_FUNC1
#define PIN_FUNCTION_N2HET1_23 PORT_FUNC1
#define PIN_FUNCTION_N2HET1_24 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_25 PORT_FUNC1
#define PIN_FUNCTION_N2HET1_26 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_27 PORT_FUNC2
#define PIN_FUNCTION_N2HET1_28 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_29 PORT_FUNC2
#define PIN_FUNCTION_N2HET1_30 PORT_FUNC0
#define PIN_FUNCTION_N2HET1_31 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_0 PORT_FUNC3
#define PIN_FUNCTION_N2HET2_1 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_10 PORT_FUNC4
#define PIN_FUNCTION_N2HET2_11 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_12 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_13 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_14 PORT_FUNC3
#define PIN_FUNCTION_N2HET2_15 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_15 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_16 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_18 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_2 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_3 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_4 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_5 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_6 PORT_FUNC1
#define PIN_FUNCTION_N2HET2_7 PORT_FUNC2
#define PIN_FUNCTION_N2HET2_8 PORT_FUNC4
#define PIN_FUNCTION_N2HET2_9 PORT_FUNC2
#define PIN_FUNCTION_NTZ1 PORT_FUNC3
#define PIN_FUNCTION_NTZ2 PORT_FUNC3
#define PIN_FUNCTION_NTZ3 PORT_FUNC4
#define PIN_FUNCTION_RMII_CRS_DV PORT_FUNC2
#define PIN_FUNCTION_RMII_REFCLK PORT_FUNC2
#define PIN_FUNCTION_RMII_RX_ER PORT_FUNC2
#define PIN_FUNCTION_RMII_RXD_0 PORT_FUNC3
#define PIN_FUNCTION_RMII_RXD_1 PORT_FUNC2
#define PIN_FUNCTION_RMII_TXD_0 PORT_FUNC3
#define PIN_FUNCTION_RMII_TXD_1 PORT_FUNC3
#define PIN_FUNCTION_RMII_TXEN PORT_FUNC3
#define PIN_FUNCTION_SCIRX PORT_FUNC1
#define PIN_FUNCTION_SCITX PORT_FUNC1
#define PIN_FUNCTION_SPI2NCS_1 PORT_FUNC1
#define PIN_FUNCTION_SPI2NENA PORT_FUNC0
#define PIN_FUNCTION_SPI4CLK PORT_FUNC1
#define PIN_FUNCTION_SPI4NCS_0 PORT_FUNC1
#define PIN_FUNCTION_SPI4NENA PORT_FUNC1
#define PIN_FUNCTION_SPI4SIMO PORT_FUNC1
#define PIN_FUNCTION_SPI4SOMI PORT_FUNC1


#define PIN_AD1EVT_REG_BIT  0
#define PIN_AD1EVT_REG_OFFSET 10
#define PIN_AD2EVT_REG_BIT 17
#define PIN_AD2EVT_REG_OFFSET 9
#define PIN_AWM_EXT_ENA_REG_BIT 9
#define PIN_AWM_EXT_ENA_REG_OFFSET 33
#define PIN_AWM_EXT_SEL_0_REG_BIT 17
#define PIN_AWM_EXT_SEL_0_REG_OFFSET 33
#define PIN_AWM_EXT_SEL_1_REG_BIT 25
#define PIN_AWM_EXT_SEL_1_REG_OFFSET 33
#define PIN_ECAP1_REG_BIT 18
#define PIN_ECAP1_REG_OFFSET 8
#define PIN_ECAP2_REG_BIT 10
#define PIN_ECAP2_REG_OFFSET 33
#define PIN_ECAP3_REG_BIT 18
#define PIN_ECAP3_REG_OFFSET 33
#define PIN_ECAP4_REG_BIT 20
#define PIN_ECAP4_REG_OFFSET 12
#define PIN_ECAP5_REG_BIT 29
#define PIN_ECAP5_REG_OFFSET 12
#define PIN_ECAP6_REG_BIT 28
#define PIN_ECAP6_REG_OFFSET 13
#define PIN_EMIF_ADDR_0_REG_BIT  0
#define PIN_EMIF_ADDR_0_REG_OFFSET 22
#define PIN_EMIF_ADDR_1_REG_BIT  0
#define PIN_EMIF_ADDR_1_REG_OFFSET 21
#define PIN_EMIF_ADDR_6_REG_BIT 16
#define PIN_EMIF_ADDR_6_REG_OFFSET 22
#define PIN_EMIF_ADDR_7_REG_BIT  8
#define PIN_EMIF_ADDR_7_REG_OFFSET 22
#define PIN_EMIF_ADDR_8_REG_BIT  0
//#define PIN_EMIF_ADDR_8_REG_BIT 24
#define PIN_EMIF_ADDR_8_REG_OFFSET 22
//#define PIN_EMIF_ADDR_8_REG_OFFSET 23
#define PIN_EMIF_BA_1_REG_BIT 24
#define PIN_EMIF_BA_1_REG_OFFSET 14
#define PIN_EMIF_DATA_11_REG_BIT  8
//#define PIN_EMIF_DATA_11_REG_BIT 9
#define PIN_EMIF_DATA_11_REG_OFFSET  6
//#define PIN_EMIF_DATA_11_REG_OFFSET 6
#define PIN_EMIF_NCS_0_REG_BIT 16
#define PIN_EMIF_NCS_0_REG_OFFSET 10
#define PIN_EMIF_NCS_3_REG_BIT  0
#define PIN_EMIF_NCS_3_REG_OFFSET 11
#define PIN_EMIF_NWE_REG_BIT 16
#define PIN_EMIF_NWE_REG_OFFSET 14
#define PIN_EMIF_RNW_REG_BIT 17
#define PIN_EMIF_RNW_REG_OFFSET 14
#define PIN_ETPWM4A_REG_BIT 2
#define PIN_ETPWM4A_REG_OFFSET 27
#define PIN_EQEP1A_REG_BIT 26
#define PIN_EQEP1A_REG_OFFSET 33
#define PIN_EQEP1B_REG_BIT 11
#define PIN_EQEP1B_REG_OFFSET 9
#define PIN_EQEP1I_REG_BIT 19
#define PIN_EQEP1I_REG_OFFSET 9
#define PIN_EQEP1S_REG_BIT 20
#define PIN_EQEP1S_REG_OFFSET 20
#define PIN_EQEP2A_REG_BIT 21
#define PIN_EQEP2A_REG_OFFSET 4
#define PIN_EQEP2B_REG_BIT 29
#define PIN_EQEP2B_REG_OFFSET 4
#define PIN_EQEP2I_REG_BIT 4
#define PIN_EQEP2I_REG_OFFSET 2
#define PIN_EQEP2S_REG_BIT 11
#define PIN_EQEP2S_REG_OFFSET 19
#define PIN_ETPWM1A_REG_BIT 26
#define PIN_ETPWM1A_REG_OFFSET 2
#define PIN_ETPWM1B_REG_BIT 18
#define PIN_ETPWM1B_REG_OFFSET 3
#define PIN_ETPWM1SYNCI_REG_BIT 1
#define PIN_ETPWM1SYNCI_REG_OFFSET 34
#define PIN_ETPWM1SYNCO_REG_BIT 13
//#define PIN_ETPWM1SYNCO_REG_BIT 2
#define PIN_ETPWM1SYNCO_REG_OFFSET 1
//#define PIN_ETPWM1SYNCO_REG_OFFSET 34
#define PIN_ETPWM2A_REG_BIT 2
#define PIN_ETPWM2A_REG_OFFSET 4
#define PIN_ETPWM2B_REG_BIT 2
#define PIN_ETPWM2B_REG_OFFSET 5
#define PIN_ETPWM3A_REG_BIT 10
#define PIN_ETPWM3A_REG_OFFSET 5
#define PIN_ETPWM3B_REG_BIT 19
#define PIN_ETPWM3B_REG_OFFSET 5
#define PIN_ETPWM4B_REG_BIT 1
#define PIN_ETPWM4B_REG_OFFSET 33
#define PIN_ETPWM5A_REG_BIT 18
#define PIN_ETPWM5A_REG_OFFSET 7
#define PIN_ETPWM5B_REG_BIT 2
#define PIN_ETPWM5B_REG_OFFSET 8
#define PIN_ETPWM6A_REG_BIT 9
#define PIN_ETPWM6A_REG_OFFSET 34
#define PIN_ETPWM6B_REG_BIT 17
#define PIN_ETPWM6B_REG_OFFSET 34
#define PIN_ETPWM7A_REG_BIT 20
#define PIN_ETPWM7A_REG_OFFSET 6
#define PIN_ETPWM7B_REG_BIT 4
#define PIN_ETPWM7B_REG_OFFSET 6
#define PIN_EXTCLKIN_REG_BIT 25
#define PIN_EXTCLKIN_REG_OFFSET 2
#define PIN_GIOA_0_REG_BIT 0
#define PIN_GIOA_0_REG_OFFSET 0
#define PIN_GIOA_1_REG_BIT 1
#define PIN_GIOA_1_REG_OFFSET 0
#define PIN_GIOA_2_REG_BIT 2
#define PIN_GIOA_2_REG_OFFSET 0
#define PIN_GIOA_3_REG_BIT 3
#define PIN_GIOA_3_REG_OFFSET 0
#define PIN_GIOA_4_REG_BIT 4
#define PIN_GIOA_4_REG_OFFSET 0
#define PIN_GIOA_5_REG_BIT 5
#define PIN_GIOA_5_REG_OFFSET 0
#define PIN_GIOA_6_REG_BIT 6
#define PIN_GIOA_6_REG_OFFSET 0
#define PIN_GIOA_7_REG_BIT 7
#define PIN_GIOA_7_REG_OFFSET 0
#define PIN_GIOB_0_REG_BIT 0
#define PIN_GIOB_0_REG_OFFSET 1
#define PIN_GIOB_1_REG_BIT 1
#define PIN_GIOB_1_REG_OFFSET 1
#define PIN_GIOB_2_REG_BIT 2
#define PIN_GIOB_2_REG_OFFSET 1
#define PIN_GIOB_3_REG_BIT 3
#define PIN_GIOB_3_REG_OFFSET 1
#define PIN_GIOB_4_REG_BIT 4
#define PIN_GIOB_4_REG_OFFSET 1
#define PIN_GIOB_5_REG_BIT 5
#define PIN_GIOB_5_REG_OFFSET 1
#define PIN_GIOB_6_REG_BIT 6
#define PIN_GIOB_6_REG_OFFSET 1
#define PIN_GIOB_7_REG_BIT 7
#define PIN_GIOB_7_REG_OFFSET 1
#define PIN_I2C_SCL_REG_BIT 17
#define PIN_I2C_SCL_REG_OFFSET 0
#define PIN_I2C_SDA_REG_BIT 25
#define PIN_I2C_SDA_REG_OFFSET 0
#define PIN_MDCLK_REG_BIT 10
#define PIN_MDCLK_REG_OFFSET 7
#define PIN_MDIO_REG_BIT 10
#define PIN_MDIO_REG_OFFSET 8
#define PIN_MIBSPI1NCS_0_REG_BIT 24
#define PIN_MIBSPI1NCS_0_REG_OFFSET 13
#define PIN_MIBSPI1NCS_1_REG_BIT 16
#define PIN_MIBSPI1NCS_1_REG_OFFSET 20
#define PIN_MIBSPI1NCS_2_REG_BIT  8
#define PIN_MIBSPI1NCS_2_REG_OFFSET  8
#define PIN_MIBSPI1NCS_3_REG_BIT 24
#define PIN_MIBSPI1NCS_3_REG_OFFSET  9
#define PIN_MIBSPI1NCS_4_REG_BIT 17
#define PIN_MIBSPI1NCS_4_REG_OFFSET 8
#define PIN_MIBSPI1NCS_5_REG_BIT 25
#define PIN_MIBSPI1NCS_5_REG_OFFSET 11
#define PIN_MIBSPI1NENA_REG_BIT 16
#define PIN_MIBSPI1NENA_REG_OFFSET 12
#define PIN_MIBSPI1SIMO_1_REG_BIT 1
#define PIN_MIBSPI1SIMO_1_REG_OFFSET 14
#define PIN_MIBSPI1SOMI_1_REG_BIT 25
#define PIN_MIBSPI1SOMI_1_REG_OFFSET 13
#define PIN_MIBSPI3CLK_REG_BIT 24
#define PIN_MIBSPI3CLK_REG_OFFSET 33
#define PIN_MIBSPI3NCS_0_REG_BIT 16
#define PIN_MIBSPI3NCS_0_REG_OFFSET  9
#define PIN_MIBSPI3NCS_1_REG_BIT  8
#define PIN_MIBSPI3NCS_1_REG_OFFSET  7
#define PIN_MIBSPI3NCS_2_REG_BIT 24
#define PIN_MIBSPI3NCS_2_REG_OFFSET  0
#define PIN_MIBSPI3NCS_3_REG_BIT 16
#define PIN_MIBSPI3NCS_3_REG_OFFSET  0
#define PIN_MIBSPI3NCS_4_REG_BIT 9
#define PIN_MIBSPI3NCS_4_REG_OFFSET 1
#define PIN_MIBSPI3NCS_5_REG_BIT 9
#define PIN_MIBSPI3NCS_5_REG_OFFSET 9
#define PIN_MIBSPI3NENA_REG_BIT  8
#define PIN_MIBSPI3NENA_REG_OFFSET  9
#define PIN_MIBSPI3SIMO_0_REG_BIT 16
#define PIN_MIBSPI3SIMO_0_REG_OFFSET 33
#define PIN_MIBSPI3SOMI_0_REG_BIT  8
#define PIN_MIBSPI3SOMI_0_REG_OFFSET 33
#define PIN_MIBSPI5CLK_REG_BIT 16
#define PIN_MIBSPI5CLK_REG_OFFSET 13
#define PIN_MIBSPI5NCS_0_REG_BIT  0
#define PIN_MIBSPI5NCS_0_REG_OFFSET 27
#define PIN_MIBSPI5NENA_REG_BIT 24
#define PIN_MIBSPI5NENA_REG_OFFSET 12
#define PIN_MIBSPI5SIMO_0_REG_BIT  8
#define PIN_MIBSPI5SIMO_0_REG_OFFSET 13
#define PIN_MIBSPI5SOMI_0_REG_BIT  0
#define PIN_MIBSPI5SOMI_0_REG_OFFSET 13
#define PIN_MIBSPI5SOMI_1_REG_BIT 28
#define PIN_MIBSPI5SOMI_1_REG_OFFSET 12
#define PIN_MIBSPI5SOMI_2_REG_BIT 12
#define PIN_MIBSPI5SOMI_2_REG_OFFSET 13
#define PIN_MII_COL_REG_BIT 18
#define PIN_MII_COL_REG_OFFSET 20
#define PIN_MII_CRS_REG_BIT 17
#define PIN_MII_CRS_REG_OFFSET 17
#define PIN_MII_RX_AVCLK4_REG_BIT 11
#define PIN_MII_RX_AVCLK4_REG_OFFSET 14
#define PIN_MII_RX_DV_REG_BIT 9
#define PIN_MII_RX_DV_REG_OFFSET 19
#define PIN_MII_RX_ER_REG_BIT 1
#define PIN_MII_RX_ER_REG_OFFSET 10
#define PIN_MII_RXCLK_REG_BIT 9
#define PIN_MII_RXCLK_REG_OFFSET 14
#define PIN_MII_RXD_0_REG_BIT 26
#define PIN_MII_RXD_0_REG_OFFSET 11
#define PIN_MII_RXD_1_REG_BIT 1
#define PIN_MII_RXD_1_REG_OFFSET 12
#define PIN_MII_RXD_2_REG_BIT 18
#define PIN_MII_RXD_2_REG_OFFSET 12
#define PIN_MII_RXD_3_REG_BIT 26
#define PIN_MII_RXD_3_REG_OFFSET 12
#define PIN_MII_TX_AVCLK4_REG_BIT 3
#define PIN_MII_TX_AVCLK4_REG_OFFSET 17
#define PIN_MII_TX_CLK_REG_BIT 1
#define PIN_MII_TX_CLK_REG_OFFSET 17
#define PIN_MII_TXD_0_REG_BIT 2
#define PIN_MII_TXD_0_REG_OFFSET 13
#define PIN_MII_TXD_1_REG_BIT 10
#define PIN_MII_TXD_1_REG_OFFSET 13
#define PIN_MII_TXD_2_REG_BIT 26
#define PIN_MII_TXD_2_REG_OFFSET 13
#define PIN_MII_TXD_3_REG_BIT 2
#define PIN_MII_TXD_3_REG_OFFSET 14
#define PIN_MII_TXEN_REG_BIT 18
#define PIN_MII_TXEN_REG_OFFSET 13
#define PIN_N2HET1_0_REG_BIT  0
#define PIN_N2HET1_0_REG_OFFSET  2
#define PIN_N2HET1_01_REG_BIT 1
#define PIN_N2HET1_01_REG_OFFSET  2
#define PIN_N2HET1_02_REG_BIT  2
#define PIN_N2HET1_02_REG_OFFSET  2
#define PIN_N2HET1_03_REG_BIT 3
#define PIN_N2HET1_03_REG_OFFSET  2
#define PIN_N2HET1_04_REG_BIT  4
#define PIN_N2HET1_04_REG_OFFSET 2
#define PIN_N2HET1_05_REG_BIT 5
#define PIN_N2HET1_05_REG_OFFSET  2
#define PIN_N2HET1_06_REG_BIT 6
#define PIN_N2HET1_06_REG_OFFSET  2
#define PIN_N2HET1_07_REG_BIT  7
#define PIN_N2HET1_07_REG_OFFSET  2
#define PIN_N2HET1_08_REG_BIT  8
#define PIN_N2HET1_08_REG_OFFSET 2
#define PIN_N2HET1_09_REG_BIT 9
#define PIN_N2HET1_09_REG_OFFSET 2
#define PIN_N2HET1_10_REG_BIT  10
#define PIN_N2HET1_10_REG_OFFSET 2
#define PIN_N2HET1_11_REG_BIT  11
#define PIN_N2HET1_11_REG_OFFSET  2
#define PIN_N2HET1_12_REG_BIT 12
#define PIN_N2HET1_12_REG_OFFSET 2
#define PIN_N2HET1_13_REG_BIT  13
#define PIN_N2HET1_13_REG_OFFSET 2
#define PIN_N2HET1_14_REG_BIT 14
#define PIN_N2HET1_14_REG_OFFSET 2 //PIN14 added manually
#define PIN_N2HET1_15_REG_BIT 15
#define PIN_N2HET1_15_REG_OFFSET 2
#define PIN_N2HET1_16_REG_BIT  16
#define PIN_N2HET1_16_REG_OFFSET 2
#define PIN_N2HET1_17_REG_BIT 17
#define PIN_N2HET1_17_REG_OFFSET 2
#define PIN_N2HET1_18_REG_BIT  18
#define PIN_N2HET1_18_REG_OFFSET 2
#define PIN_N2HET1_19_REG_BIT 19
#define PIN_N2HET1_19_REG_OFFSET 2
#define PIN_N2HET1_20_REG_BIT 20
#define PIN_N2HET1_20_REG_OFFSET 2
#define PIN_N2HET1_21_REG_BIT 21
#define PIN_N2HET1_21_REG_OFFSET 2
#define PIN_N2HET1_22_REG_BIT 22
#define PIN_N2HET1_22_REG_OFFSET 2 //PIN22 added manually
#define PIN_N2HET1_23_REG_BIT 23
#define PIN_N2HET1_23_REG_OFFSET 2
#define PIN_N2HET1_24_REG_BIT 24
#define PIN_N2HET1_24_REG_OFFSET 2
#define PIN_N2HET1_25_REG_BIT 25
#define PIN_N2HET1_25_REG_OFFSET 2
#define PIN_N2HET1_26_REG_BIT  26
#define PIN_N2HET1_26_REG_OFFSET 2
#define PIN_N2HET1_27_REG_BIT 27
#define PIN_N2HET1_27_REG_OFFSET 2
#define PIN_N2HET1_28_REG_BIT  28
#define PIN_N2HET1_28_REG_OFFSET 2
#define PIN_N2HET1_29_REG_BIT 29
#define PIN_N2HET1_29_REG_OFFSET 2
#define PIN_N2HET1_30_REG_BIT  30
#define PIN_N2HET1_30_REG_OFFSET 2
#define PIN_N2HET1_31_REG_BIT 31
#define PIN_N2HET1_31_REG_OFFSET 2
#define PIN_N2HET2_0_REG_BIT 3
#define PIN_N2HET2_0_REG_OFFSET 2
#define PIN_N2HET2_1_REG_BIT 1
#define PIN_N2HET2_1_REG_OFFSET 22
#define PIN_N2HET2_10_REG_BIT 28
#define PIN_N2HET2_10_REG_OFFSET 4
#define PIN_N2HET2_11_REG_BIT 18
#define PIN_N2HET2_11_REG_OFFSET 22
#define PIN_N2HET2_12_REG_BIT 18
#define PIN_N2HET2_12_REG_OFFSET 5
#define PIN_N2HET2_13_REG_BIT 10
#define PIN_N2HET2_13_REG_OFFSET 22
#define PIN_N2HET2_14_REG_BIT 3
#define PIN_N2HET2_14_REG_OFFSET 6
#define PIN_N2HET2_15_REG_BIT 2
//#define PIN_N2HET2_15_REG_BIT 26
#define PIN_N2HET2_15_REG_OFFSET 22
//#define PIN_N2HET2_15_REG_OFFSET 23
#define PIN_N2HET2_16_REG_BIT 17
#define PIN_N2HET2_16_REG_OFFSET 6
#define PIN_N2HET2_18_REG_BIT 10
#define PIN_N2HET2_18_REG_OFFSET 1
#define PIN_N2HET2_2_REG_BIT 17
#define PIN_N2HET2_2_REG_OFFSET 2
#define PIN_N2HET2_3_REG_BIT 1
#define PIN_N2HET2_3_REG_OFFSET 21
#define PIN_N2HET2_4_REG_BIT 17
#define PIN_N2HET2_4_REG_OFFSET 3
#define PIN_N2HET2_5_REG_BIT 25
#define PIN_N2HET2_5_REG_OFFSET 14
#define PIN_N2HET2_6_REG_BIT 1
#define PIN_N2HET2_6_REG_OFFSET 4
#define PIN_N2HET2_7_REG_BIT 18
#define PIN_N2HET2_7_REG_OFFSET 10
#define PIN_N2HET2_8_REG_BIT 20
#define PIN_N2HET2_8_REG_OFFSET 4
#define PIN_N2HET2_9_REG_BIT 2
#define PIN_N2HET2_9_REG_OFFSET 11

/* Defines for functional GIO pins where the default is another function */
/* 0xFF where multiplexing is not needed */

/* N2HET1 [0] */
#define PIN_N2HET1_0_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_0_MULTI_REG_BIT 0xFF



/* N2HET1 [1] */
#define PIN_N2HET1_01_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_01_MULTI_REG_BIT 0xFF



/* N2HET1 [2] */
#define PIN_N2HET1_02_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_02_MULTI_REG_BIT 0xFF



/* N2HET1 [3] */
#define PIN_N2HET1_03_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_03_MULTI_REG_BIT 0xFF



/* N2HET1 [4] */
#define PIN_N2HET1_04_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_04_MULTI_REG_BIT 0xFF



/* N2HET1 [5] */
#define PIN_N2HET1_05_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_05_MULTI_REG_BIT 0xFF



/* N2HET1 [6] */
#define PIN_N2HET1_06_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_06_MULTI_REG_BIT 0xFF



/* N2HET1 [7] */
#define PIN_N2HET1_07_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_07_MULTI_REG_BIT 0xFF



/* N2HET1 [8] */
#define PIN_N2HET1_08_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_08_MULTI_REG_BIT 0xFF



/* N2HET1 [9] */
#define PIN_N2HET1_09_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_09_MULTI_REG_BIT 0xFF



/* N2HET1 [10] */
#define PIN_N2HET1_10_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_10_MULTI_REG_BIT 0xFF



/* N2HET1 [11] */
#define PIN_N2HET1_11_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_11_MULTI_REG_BIT 0xFF



/* N2HET1 [12] */
#define PIN_N2HET1_12_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_12_MULTI_REG_BIT 0xFF



/* N2HET1 [13] */
#define PIN_N2HET1_13_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_13_MULTI_REG_BIT 0xFF



/* N2HET1 [14] */
#define PIN_N2HET1_14_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_14_MULTI_REG_BIT 0xFF



/* N2HET1 [15] */
#define PIN_N2HET1_15_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_15_MULTI_REG_BIT 0xFF



/* N2HET1 [16] */
#define PIN_N2HET1_16_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_16_MULTI_REG_BIT 0xFF



/* N2HET1 [17] */
#define PIN_N2HET1_17_MULTI_REG_OFFSET 20
#define PIN_N2HET1_17_MULTI_REG_BIT 17


/* N2HET1 [18] */
#define PIN_N2HET1_18_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_18_MULTI_REG_BIT 0xFF



/* N2HET1 [19] */
#define PIN_N2HET1_19_MULTI_REG_OFFSET 8
#define PIN_N2HET1_19_MULTI_REG_BIT 9


/* N2HET1 [20] */
#define PIN_N2HET1_20_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_20_MULTI_REG_BIT 0xFF



/* N2HET1 [21] */
#define PIN_N2HET1_21_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_21_MULTI_REG_BIT 0xFF



/* N2HET1 [22] */
#define PIN_N2HET1_22_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_22_MULTI_REG_BIT 0xFF



/* N2HET1 [23] */
#define PIN_N2HET1_23_MULTI_REG_OFFSET 12
#define PIN_N2HET1_23_MULTI_REG_BIT 17


/* N2HET1 [24] */
#define PIN_N2HET1_24_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_24_MULTI_REG_BIT 0xFF


/* N2HET1 [25] */
#define PIN_N2HET1_25_MULTI_REG_OFFSET 7
#define PIN_N2HET1_25_MULTI_REG_BIT 9

/* N2HET1 [26] */
#define PIN_N2HET1_26_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_26_MULTI_REG_BIT 0xFF

/* N2HET1 [27] */
#define PIN_N2HET1_27_MULTI_REG_OFFSET 0
#define PIN_N2HET1_27_MULTI_REG_BIT 26

/* N2HET1 [28] */
#define PIN_N2HET1_28_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_28_MULTI_REG_BIT 0xFF

/* N2HET1 [29] */
#define PIN_N2HET1_29_MULTI_REG_OFFSET 0
#define PIN_N2HET1_29_MULTI_REG_BIT 18

/* N2HET1 [30] */
#define PIN_N2HET1_30_MULTI_REG_OFFSET 0xFF
#define PIN_N2HET1_30_MULTI_REG_BIT 0xFF

/* N2HET1 [31] */
#define PIN_N2HET1_31_MULTI_REG_OFFSET 9
#define PIN_N2HET1_31_MULTI_REG_BIT 10

#define PIN_NTZ1_REG_BIT 19
#define PIN_NTZ1_REG_OFFSET 0
#define PIN_NTZ2_REG_BIT 27
#define PIN_NTZ2_REG_OFFSET 0
#define PIN_NTZ3_REG_BIT 4
#define PIN_NTZ3_REG_OFFSET 17
#define PIN_RMII_CRS_DV_REG_BIT 18
#define PIN_RMII_CRS_DV_REG_OFFSET 17
#define PIN_RMII_REFCLK_REG_BIT 10
#define PIN_RMII_REFCLK_REG_OFFSET 14
#define PIN_RMII_RX_ER_REG_BIT 2
#define PIN_RMII_RX_ER_REG_OFFSET 10
#define PIN_RMII_RXD_0_REG_BIT 27
#define PIN_RMII_RXD_0_REG_OFFSET 11
#define PIN_RMII_RXD_1_REG_BIT 2
#define PIN_RMII_RXD_1_REG_OFFSET 12
#define PIN_RMII_TXD_0_REG_BIT 3
#define PIN_RMII_TXD_0_REG_OFFSET 13
#define PIN_RMII_TXD_1_REG_BIT 11
#define PIN_RMII_TXD_1_REG_OFFSET 13
#define PIN_RMII_TXEN_REG_BIT 19
#define PIN_RMII_TXEN_REG_OFFSET 13
#define PIN_SCIRX_REG_BIT 17
#define PIN_SCIRX_REG_OFFSET 7
#define PIN_SCITX_REG_BIT 1
#define PIN_SCITX_REG_OFFSET 8
#define PIN_SPI2NCS_1_REG_BIT 1
#define PIN_SPI2NCS_1_REG_OFFSET 29
#define PIN_SPI2NENA_REG_BIT  0
#define PIN_SPI2NENA_REG_OFFSET 29
#define PIN_SPI4CLK_REG_BIT 1
#define PIN_SPI4CLK_REG_OFFSET 5
#define PIN_SPI4NCS_0_REG_BIT 25
#define PIN_SPI4NCS_0_REG_OFFSET 4
#define PIN_SPI4NENA_REG_BIT 17
#define PIN_SPI4NENA_REG_OFFSET 4
#define PIN_SPI4SIMO_REG_BIT 9
#define PIN_SPI4SIMO_REG_OFFSET 5
#define PIN_SPI4SOMI_REG_BIT 17
#define PIN_SPI4SOMI_REG_OFFSET 5

/* Below: special bit offsets for SPI5 pins when used
 * as DIO
 *
 * The REG_OFFSET defines are not used in the MCAL and
 * are just there to keep the generators happy
 */
#define PIN_MIBSPI5NCS_0_REG_BIT_DIO  0
#define PIN_MIBSPI5NCS_1_REG_BIT_DIO  1
#define PIN_MIBSPI5NCS_2_REG_BIT_DIO  2
#define PIN_MIBSPI5NCS_3_REG_BIT_DIO  3
#define PIN_MIBSPI5NENA_REG_BIT_DIO   8
#define PIN_MIBSPI5CLK_REG_BIT_DIO    9
#define PIN_MIBSPI5SIMO_0_REG_BIT_DIO 16
#define PIN_MIBSPI5SIMO_1_REG_BIT_DIO 17
#define PIN_MIBSPI5SIMO_2_REG_BIT_DIO 18
#define PIN_MIBSPI5SIMO_3_REG_BIT_DIO 19
#define PIN_MIBSPI5SOMI_0_REG_BIT_DIO 24
#define PIN_MIBSPI5SOMI_1_REG_BIT_DIO 25
#define PIN_MIBSPI5SOMI_2_REG_BIT_DIO 26
#define PIN_MIBSPI5SOMI_3_REG_BIT_DIO 27

/* The REG_OFFSETS below are for those pins that are only in this
 * file because of GIO functionality. They do not need functional
 * toggling.
 * Additions are: CS 1-3, SOMI3, SIMO 1-3
 */

#define PIN_MIBSPI5NCS_1_REG_OFFSET  0
#define PIN_MIBSPI5NCS_2_REG_OFFSET  0
#define PIN_MIBSPI5NCS_3_REG_OFFSET  0
#define PIN_MIBSPI5SOMI_3_REG_OFFSET 0
#define PIN_MIBSPI5SIMO_1_REG_OFFSET 0
#define PIN_MIBSPI5SIMO_2_REG_OFFSET 0
#define PIN_MIBSPI5SIMO_3_REG_OFFSET 0



#endif /* TMS570_PORTDEFS_H_ */
